1. Field of the Invention
The present invention relates to a plasma apparatus, and more particularly, to a plasma generating apparatus used as a plasma etching apparatus for a film deposition.
A plasma generating apparatus is used, for example, as a plasma etching apparatus for etching oxide layers in manufacturing semiconductor devices. As modern semiconductor elements become finer, the mask size is reduced in proportion, and the thickness of a to-be-etched layer, that is, oxide layer on a step portion, increases and the groove becomes thinner, correspondingly. Thus, the semiconductor devices have a high aspect structure. In this high aspect structure, a reacted gas (reaction product) cannot easily escape from a hole or trench formed in the oxide layer, so that a reaction gas to be supplied next cannot easily enter the hole or trench. In some cases, therefore, the etching rate may lower, or the reaction product may adhere again to the oxide layer thereby preventing the layer from being etched. Such a situation can be avoided to improve the etching rate by only lowering the pressure of a surrounding gas in a chamber, thereby allowing the reaction product to escape easily from the trench. Alternatively, an ion energy required for etching may be controlled by a flow of argon (Ar) gas.
Lowering the surrounding gas pressure in the chamber or controlling the argon gas flow, however, arouses the following problem.
If a high frequency power supply unit is connected to an upper electrode disposed in a grounded vacuum chamber, and if a lower electrode is grounded, for example, the surrounding gas pressure is lowered and the distance between the inner wall of the chamber and the upper or lower electrode becomes relatively shorter than that between the upper and lower electrodes, so that electrons in plasma are liable to move to the inner wall of the chamber as well as to the lower electrode, that is, abnormal electric discharge is easily caused in relation to the inner wall. In case of such abnormal discharge, production of uniform plasma is prevented, and uniformity of semiconductor wafer processing cannot be secured.
A plasma etching system disclosed in U.S. Pat. No. 4,871,421 is one of solutions to the above problem. In this conventional system, a transformer is provided having primary and secondary windings connected electrically to each other. A high frequency power supply unit is connected to the primary winding, two opposite ends of the secondary winding are connected to upper and lower electrodes, respectively, and an intermediate tap of the secondary winding is grounded. When a high frequency electric power is supplied from the high frequency power supply unit to the primary winding, in the apparatus constructed in this manner, high frequency electric powers of equal levels with a phase difference of 180.degree. are delivered from the secondary winding, and are supplied to the upper and lower electrodes, respectively.
According to the conventional plasma etching apparatus described above, the potential difference between the upper and lower electrodes can be made greater than that between each electrode and the inner wall of a chamber, so that electrons in plasma can be restrained from moving to the chamber wall even though the surrounding gas pressure is lowered. Thus, abnormal electric discharge can be prevented, and a uniform plasma condition can be secured between the upper and lower electrodes in the chamber.
In this conventional system, however, the high frequency powers of opposite phases are supplied to the upper and lower electrodes on the same power level, so that a power of a relatively high level is supplied to the lower electrode. As a result, ions act intensively on a semiconductor wafer placed on the lower electrode, thereby damaging the wafer. If the lower electrode is designed so as to be supplied with the high electric power, moreover, the construction of the lower electrode, which requires a cooling structure and a structure for up-and-down motion, will be complicated.
If the electric power supplied to the lower electrode is too low, on the other hand, the plasma condition on the semiconductor wafer is so irregular that the etching rate lowers.